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Popis předmětu - AE0B36APO

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AE0B36APO Computer Architectures Rozsah výuky:2+2L
Garanti:Píša P. Role:PO,P,V Zakončení:Z,ZK
Vyučující:Píša P., Štěpanovský M.
Zodpovědná katedra:13136 Kreditů:6 Semestr:L

Anotace:

Subject provides overview of basic building blocks of computer systems. Explanation starts from hardware side where it extends knowledge presented in the previous lectures of Structures of computer systems. Topics cover building blocks description, CPU structure, multiple processors interconnections, input/output subsystem and basic overview of network and buses topologies. Emphasis is placed on clarification of interconnection of hardware components with software support, mainly lower levels of operating systems, device drivers and virtualization techniques. General principles are more elaborated during presentation of examples of multiple standard CPU architectures. Exercises are more focused on the software view to the contrary. Students are lead from basic programming on CPU level to the interaction with raw hardware.

Výsledek studentské ankety předmětu je zde: AE0B36APO

Cíle studia:

Předmět seznamuje s architekturou počítačů a studenti poznají funkcionalitu jeho typických podsystémů.

Osnovy přednášek:

1. Architecture, structure and organization of computers and its subsystems.
Data and numbers representation and storage in computer systems (signed integer numbers, IEEE-754).
2. Central Processing Unit (CPU) - arithmetic logic unit (ALU), von Neumann architecture, instruction set and encoding, single cycle processor, control unit (CU)
3. Memory - Hierarchical concept, storage technologies, memory management, MMU, data caching, data consistency
4. Pipelined instruction execution, hazards, stages balancing, super-scalar systems
5. Input output subsystem of the computer, shared bus, point-to-point connections, networks, PCI and PCI express, burst mode
6. Industrial computers buses (VME), MULTIBUS, PCIe protocol, reasons to replace parallel buses by multi-lane serial buses, disc storage, data protection and RAID
7. External events processing (interrupts), exceptions, real time clocks, direct memory access, bus master peripherals
8. Processors and computers networks - Topologies, communication, categories LAN, MAN, WAN, networks of control computers
9. Parameters passing to subroutines and operating system implemented virtual instructions. Stack frames, register windows, privilege modes switching and system calls implementation.
10. Classic register memory-oriented CISC architecture.
Principles demonstrated on FreeScale M68xxx/ColdFire architecture. MMU implementation, cache, busses etc.
11. INTEL x86 processor family from 8086 to EMT64, main focus on 32-bit and 64-bit operating modes supplemented with compatibility dictated 16-bit 8086 mode and 80286 segmented approach and why it is used minimally by todays OSes. SIMD instruction examples (MMX, SSE).
12. Short overview of CPU architectures and concepts development (RISC/CISC) - CPU examples ARM, ColdFire, SPARC, PowerPC and CPUs optimized for embedded applications
13. Multi-level computer organization, virtual machines.
Conventional (ISA) architecture and implementation dependent microarchitecture. Portable bytecode and virtual programming environments (Java, C#/.Net). Virtualization techniques (i.e. XEN, VMWARE) and paravirtualization.
14. Analog and digital I/O interfacing, data acquisition and processing
system.

Osnovy cvičení:

1. Introduction to the labs, computer number formats, numeral systems, entrance test
2. Integer and floating point number representation and operations
3. Basic processor structure and instruction set
4. Hierarchical memory concept, cache
5. Pipeline and hazards
6. Branch prediction and code optimization
7. Memory mapped I/O regions
8. I/O buses and peripherals implementation
9. Mid-term test. Introduction to low level C programming
10. Semester project assignment
11. Independent solving of main task
12. Independent solving of main task
13. Main task hand in and presentation
14. Assessment

Literatura:

[1] Hennessy, J. L., and D. A. Patterson. Computer Architecture: A Quantitative Approach, 3rd ed. San Mateo, CA: Morgan Kaufman, 2002.
ISBN: 1558605967.
[2] Patterson, D. A., and J. L. Hennessy. Computer Organization and
Design: The Hardware/Software Interface, 3rd ed. San Mateo, CA: Morgan Kaufman, 2004. ISBN: 1558606041.
[3] Andrew S. Tanenbaum: Structured Computer Organization. Printice Hall, 2006. ISBN-10:0131485210.
[4] Andrew S. Tanenbaum: Computer Networks. Prentice Hall 2003. ISBN-10:0-13-066102-3.
[5] Andrew S. Tanenbaum: Modern Operating Systems. Prentice Hall 2001
[6] Hyde, R.: The Art of Assembly Language, 2003, 928 pp.
ISBN-10 1-886411-97-2 ISBN-13 978-1-886411-97 http://webster.cs.ucr.edu/AoA/
[7] Bach., M., J.: The Design of the UNIX Operating System,
Prentice Hall, 1986
[8] Bayko., J.: Great Microprocessors of the Past and Present
http://www.cpushack.com/CPU/cpu.html

Požadavky:

Basic knowledge of C language and area of combinatorial and sequential logic circuits. Basic knowledge of command line and compilers use in POSIX standard conformant environment (i.e. Linux) is invited.

Poznámka:

Computer architectures For combined form attendees: 14p+6l
Course materials at: https://cw.felk.cvut.cz/wiki/courses/b35apo/en .

Webová stránka:

https://cw.felk.cvut.cz/wiki/courses/b35apo/en

Předmět je zahrnut do těchto studijních plánů:

Plán Obor Role Dop. semestr
BEKME3 Aplikovaná elektronika V 4
BEKME5 Komunikace a elektronika V 4
BEKME2 Multimediální technika V 4
BEKME1 Komunikační technika V 4
BEKME_BO Před zařazením do oboru V 4
BEKME4 Síťové a informační technologie V 4
BEEEM_BO Před zařazením do oboru V 4
BEEEM2 Elektrotechnika a management V 4
BEEEM1 Aplikovaná elektrotechnika V 4
BEKYR3 Systémy a řízení PO 4
BEOI2 Informatika a počítačové vědy P 4
BEOI1 Počítačové systémy P 4
BEOI_BO Před zařazením do oboru P 4
BEOI3 Softwarové systémy P 4
BPOI1 Počítačové systémy P
BPOI2 Informatika a počítačové vědy P
BPOI3 Softwarové systémy P
BPOI_BO Před zařazením do oboru P


Stránka vytvořena 21.4.2017 18:00:43, semestry: Z,L/2016-7, Z,L/2017-8, Z/2018-9, připomínky k informační náplni zasílejte správci studijních plánů Návrh a realizace: I. Halaška (K336), J. Novák (K336)
Za obsah odpovídá: doc. Ing. Ivan Jelínek, CSc.