Subject description - AD4M36PAP

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AD4M36PAP Advanced Computer Architectures Extent of teaching:14+6c
Guarantors:  Roles:Z,PO,V Language of
teaching:
CS
Teachers:  Completion:Z,ZK
Responsible Department:13136 Credits:6 Semester:Z

Anotation:

This course extends knowledge of modern computer architecture. Mainly the architecture of nowadays processors utilizing instruction and/or thread level parallelism and advanced pipelining is in the center of our attention. A special emphasis will be devoted to the implementation of parallelism in hardware, parallel program design, and advanced instruction scheduling and execution.

Course outlines:

1. Introduction
(Control flow computers and Data flow computers. Flynn's taxonomy. Parallel processing. Amdahl's and Gustavson's law. Metrics.)
2. From scalar processors to superscalar processors - basic organization of superscalar processor
(Static, dynamic and hybrid scheduling of the instruction flow)
3. Superscalar techniques I - Register data flow
(Register renaming - Tomasulo's algorithm. Data speculation. Precise exception support.)
4. Superscalar techniques II - Instruction flow, speculation
(Prediction and Predictors, Branch misprediction recovery)
5. Superscalar techniques III - Memory data flow; VLIW and EPIC
(Load bypassing and Load forwarding. Load speculation. Data parallelism, SIMD and vector instructions in ISA; Loop-unrolling and software pipelining.)
6. Memory subsystem
(Non-blocking cache, Victim cache, Virtual memory and cache)
7. Multiprocessor systems and Memory coherence
(Distributed memory systems and Shared memory systems. Symmetric multiprocessor systems (SMP). Coherence in SMP)
8. Multiprocessor systems and Memory consistency
(Rules for memory operations, Sequential consistency and other consistency models.)
9. Programming of parallel systems I - Data consistency on multiprocessor system
(Parallel computing concepts, Programming issues, Parallel programming paradigms, Message Passing Interface and Open Multi-Processing)
10. Programming of parallel systems II
(Synchronization)
11. I/O subsytem
(PCIe, HyperTransport, QuickPathInterconnect)
12. MPP and clusters, interconnection networks
13. Architecture perspectives

Exercises outline:

1. Introduction, semester project assignment
2. Instruction set and compilation
3. Pipelined processor simulator
4. Optimization algorithms for pipelined processor
5. Superscalar processor simulator
6. Intro of semester projects presentation
7.-11.  Semester projects processing
12.-14.  Semester projects presentation and defense

Literature:

1. Hennesy, J. L., Patterson, D. A.: Computer Architecture : A Quantitative Approach, Third Edition, San Francisco, Morgan Kaufmann Publishers, Inc., 2002
2. Shen, J.P., Lipasti, M.H.: Modern Processor Design : Fundamentals of Superscalar Processors, First Edition, New York, McGraw-Hill Inc., 2004
3. Grama A., Gupta, A. et al.: Introduction to Parallel Computing, Second Edition, Addison Wesley, 2003

Requirements:

Stránky předmětu: https://edux.feld.cvut.cz/courses/A4M36PAP/

Webpage:

https://edux.feld.cvut.cz/courses/A4M36PAP/

Subject is included into these academic programs:

Program Branch Role Recommended semester
MKEEM1 Technological Systems V 3
MKEEM5 Economy and Management of Electrical Engineering V 3
MKEEM4 Economy and Management of Power Engineering V 3
MKEEM3 Electrical Power Engineering V 3
MKEEM2 Electrical Machines, Apparatus and Drives V 3
MKKME1 Wireless Communication V 3
MKKME5 Systems of Communication V 3
MKKME4 Networks of Electronic Communication V 3
MKKME3 Electronics V 3
MKKME2 Multimedia Technology V 3
MKOI2 Computer Engineering PO 3
MKKYR4 Aerospace Systems V 3
MVT01N-D Computer Science and Engineering Z 1
MVT04N-D Computer Science and Engineering Z 1
MKKYR1 Robotics V 3
MKKYR3 Systems and Control V 3
MKKYR2 Sensors and Instrumentation V 3


Page updated 18.6.2019 09:53:02, semester: Z,L/2020-1, L/2018-9, Z,L/2019-20, Send comments about the content to the Administrators of the Academic Programs Proposal and Realization: I. Halaška (K336), J. Novák (K336)