Subject description - A0M37CIR

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A0M37CIR Implementation of the digital circuits in Radio Extent of teaching:2+2L
Guarantors:Skalický P. Roles:V Language of
teaching:
CS
Teachers:Skalický P. Completion:Z,ZK
Responsible Department:13137 Credits:5 Semester:L

Anotation:

The course is base for student, which want practically designed circuits of the digital signal processing with the signal processors and specialised circuits. Attention is concentration to realisation of the modulators and circuit of the numerical conversion of the signal, algoritms coding/decoding, which contains in the communication chain. Dominantly is concentration to effective realization with minimal computing power.

Study targets:

Design computing power effective circuits of the digital signal processing with the signal processors and specialised circuits.

Course outlines:

1. Architecture of the high speed A/D, increasing it's performance
2. Efficient implementation of the decimation and interpolation (hardware and software)
3. Quantization of the arithmetical operations, arithmetic with attend
4. Implementation finical digital filter, possibility of the decreasing computational power
5. Utilization changes of the sampling frequency for efficient implementation
6. Efficient implementation generators of the code and interleaves
7. Hardware and software implementation security of the carried data
8. Potentialities implementation digital subsystem in MF and HF zone by PLD
9. Fast implementation of the basic operation digital system (addition, multiplication, DA, CORDIC)
10. Hardware and software implementation of the frequency synthesizer
11. Modification of the frequency synthesizer for modulation affecting amplitude, phase and frequency.
12. Implementation modulators/demodulators, processing complex envelope
13. Increasing computing performance of the DSP, parallelization for VLIW, multiprocessor systems
14. Up/down convector, description, characteristics and utilize in chipsets

Exercises outline:

1. Simulation characteristic realistic arithmetic, arithmetical noise
2. Properties of the simulator and DSK board with signal processor
3. Effective realization of the process decimate
4. Design and realization of the frequency synthesizer
5. Design and realisation of the modulator QPSK in DSK board
6. Design FSK demodulator in Matlab
7. Realization FSK demodulator in DSK board
8. Design filter with multirate digital signal processing
9. Effective implementation system with multirate digital signal processing
10. Realization QPSK modulator
11. Phase loop with digital control (DPLL)
12. Implementation circuit of the reconstruction symbol frequency (QPSK demodulator)
13. Realization CORDIC
14. Completion exercises

Literature:

1. Analog Devices High Speed Design Technique. Norwood: Analog Devices. 2000
2. Kuo.S.M: Real-Time Digital Signal Processing, John Wiley, 2006

Requirements:

see moodle.kme.fel.cvut.cz

Webpage:

https://moodle.fel.cvut.cz/courses/A0M37CIR

Keywords:

DSP, multirate digital signal processing, hardware accelerators, efective implementation

Subject is included into these academic programs:

Program Branch Role Recommended semester
MPEK3_2016 Electronics V
MPBIO1 Biomedical Informatics V
MPBIO2 Biomedical Engineering V
MPEK4_2016 Media and Signal Processing V
MPIB Common courses V
MPKME1 Wireless Communication V
MPKME5 Systems of Communication V
MPKME4 Networks of Electronic Communication V
MPKME3 Electronics V
MPKME2 Multimedia Technology V
MPEEM1 Technological Systems V
MPEEM5 Economy and Management of Electrical Engineering V
MPEEM4 Economy and Management of Power Engineering V
MPEEM3 Electrical Power Engineering V
MPEEM2 Electrical Machines, Apparatus and Drives V
MPEK2_2016 Radio and Optical Technology V
MPKYR4 Aerospace Systems V
MPKYR1 Robotics V
MPKYR3 Systems and Control V
MPKYR2 Sensors and Instrumentation V


Page updated 24.6.2019 17:52:59, semester: Z,L/2020-1, L/2018-9, Z,L/2019-20, Send comments about the content to the Administrators of the Academic Programs Proposal and Realization: I. Halaška (K336), J. Novák (K336)