Subject description - AE0B38APH

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AE0B38APH FPGA Applications
Roles:  Extent of teaching:1P+3L
Department:13138 Language of teaching:EN
Guarantors:Sedláček R. Completion:KZ
Lecturers:Sedláček R. Credits:5
Tutors:Sedláček R. Semester:Z

Web page:

https://moodle.fel.cvut.cz/courses/AE0B38APH

Anotation:

After the short introduction into the structure and technology of programmable circuits (especially the CPLD and FPGA), the lectures are devoted to the VHDL and its usage for simulation and synthesis of digital circuits. Laboratories are focused on CPLD and FPGA circuit applications and on the use of SW instruments for programmable hardware design and simulation. Within the larger project implemented in the second part of laboratories, a complete device (system on the chip) is implemented in the FPGA or CPLD circuit. Students may choose from the list of projects or they can bring their own (even group projects are possible). Development boards with FPGA (or CPLD) are available. The result of the student survey of the course is here: AE0B38APH

Study targets:

The aim of the study is to teach students to understand FPGA circuits from the point of view of their internal structure. Students will learn to program FPGA in VHDL and gain basic knowledge about the design of the so-called system on a chip (SoC). They will also get acquainted with the typical possibilities of using FPGA circuits in practice.

Content:

1. Introduction to the QUARTUS II design system, introductory project.
2. Logical and arithmetic functions in VHDL, parallel domain programming.
3. Programming in sequential domain - processes, flip-flops and counters.
4. Simulation of design using test vectors and testbench in ModelSim.
5. State machines - variants of implementation in VHDL.
6. Using internal and external RAM in projects.
7. Control test, specification of individual project (MP3 player, computer game, controller for VGA monitor,).
8. Individual project.
9. Individual project.
10. Individual project.
11. Individual project.
12. Individual project.
13. Individual project.
14. Evaluation of the results of individual project solution, getting assesment

Course outlines:

1. Programmable components, history, and present.
2. Introduction to VHDL language, design units.
3. Writing numbers of characters and strings.
4. Basic data types and operators.
5. Basic objects - constants, variables, signals.
6. Parallel and sequential domain.
7. Implementation of state machines.
8. Standard libraries, LPM library, and their use.
9. Procedures and functions.
10. Design of combinational and sequential circuits.
11. Tools and methods for simulation.
12. Special internal structures (RAM, PLL, multipliers) and their use.
13. Creation of user libraries.
14. SoC implementation using built-in NIOS II processor.

Exercises outline:

1. Introduction in QUARTUS II, opening project
2. Logic and arithmetic functions in VHDL, programming in the parallel domain.
3. Programming in the sequential domain - processes, flip-flops, and counters.
4. Design simulation using test vectors and test benches in ModelSim.
5. State automata - variants of VHDL implementation.
6. Usage of internal RAM in projects.
7. Usage of external RAM in projects.
8. Desing of SoC based on NIOS II - example I.
9. Desing of SoC based on NIOS II - example II.
10. Work on project implementation.
11. Work on project implementation.
12. Work on project implementation.
13. Work on project implementation.
14. Final project presentation, assessment.

Literature:

1. Pedroni, V.A.: Digital Electronics and Design with VHDL. Morgan Kaufmann 2008, ISBN: 978-0123742704
2. Ashenden, P. J.: The Designer's guide to VHDL. Morgan Kaufmann 2008. ISBN: 978-0-12-088785-9.

Requirements:

Basic knowledge of Boolean algebra, basic logic circuits, and programming in the C language

Keywords:

VHDL language, FPGA, System on a chip, NIOS processor

Subject is included into these academic programs:

Program Branch Role Recommended semester

Page updated 19.4.2024 07:53:16, semester: Z/2024-5, Z,L/2023-4, Send comments about the content to the Administrators of the Academic Programs Proposal and Realization: I. Halaška (K336), J. Novák (K336)
Responsible person: prof. Ing. Jiří Jakovenko, Ph.D.